1. Field of the Invention
This invention relates to a novel procedure for fabrication of MOSFETs which modifies and eliminates steps required by the prior art to provide a reduced cost and simplified fabrication process.
2. Brief description of the Prior Art
MOSFET fabrication according to a standard prior art process flow requires a large number of steps. It is known that yield generally increases and costs generally decrease by the elimination of and/or alteration of steps in the process flow and such elimination of steps and/or alteration of steps is constantly sought in the art.
Assuming commencement of fabrication with a p-type substrate (it being understood that the procedure can be operated with commencement of fabrication with an n-type substrate with all polarities reversed), an oxide and nitride layer are initially formed in that order and patterned on a substrate surface. An n-type tank is implanted into the substrate through the exposed portion of the pattern and a tank oxide is then formed over the n-type tank by removal of the nitride layer over the n-tank region followed by oxidation of the exposed region. The remaining nitride is removed and, in accordance with the prior art, a relatively low dose p-type tank implant, generally from about 2.times.10.sup.12 /cm.sup.2 to about 1.3.times.10.sup.13 /cm.sup.2 at about 50 KeV and preferably about 6.times.10.sup.12 /cm.sup.2 at 50 KeV is provided in the portion of the surface of the substrate which not masked by the tank oxide to provide a p-type tank. It is well understood that the 50 KeV energy figure used is selected in deference to the type and thickness of masks used or existing and will be sufficiently high to penetrate any mask which is intended to be penetrated and be sufficiently low so as not to penetrate any mask which is not intended to be penetrated. The dopants in the tanks and which will define the tanks are then driven farther into the substrate by annealing to define tank depth. There is then provided a second oxide and nitride deposition with patterning and etching of the second nitride deposition to form the moat or active region for the MOSFET after removal of the tank oxide, the second nitride pattern also permitting growth of a field oxide around the MOSFET, a field oxide over the junction of the n-type tank and the p-type tank. A dummy oxide is then grown over the p-type tank and the n-type tank after removal of remaining nitride. A layer of photoresist is then formed over the n-type tank extending onto the field oxide and leaving the p-type tank exposed. A p-type implant is then provided into the p-type tank to set the threshold voltage of the MOSFET, this being followed by a p-type punchthrough implant in the same region to prevent punchthrough during transistor operation. This is followed by a p-type channel stop implant followed by an implant ashing step to remove the photoresist. The n-type tank region is then patterned in standard manner in both the prior art and in accordance with the present invention to provide a p-channel for a p-channel MOSFET.